TEC VME Registers
Offset (hex)	Register Description
64000	Command Register
(C0051)	Board function control R/W
	<31:24>	undefined
	<23>	High Gain Select
		1= Gain 32, 0= Gain 8
	<22:20>	Backplane Port Select, displayed on LEDs
		Valid port values: 0-6; 7 disables output
	<19>	Blocking, 1= Supress energy for the following four
		crossings if High Gain Overflow in current crossing
	<18:16>	Command function, displayed on LEDs; values:
		0= No special function (normal running)
		1= Setup (enable read only)
		2= Setup and Write (enable read and write)
		3= * Test Mode, enable faking FADC output
		4= undefined
		5= * Initialize memories and FIFO
		6,7= undefined
	* Commands 3 and 5 disable VME access to other registers; subsequent
	reads and writes to any board address access the command register
	Hardware ID RO
	<15:8>	undefined
	<7:0>	Hardware ID, unique to board (set via jumpers)
	When writing to the command register, bits <15:0> must be the same as bits <32:16>
64004	Low Gain Pedestal DAC (all low gain channels) WO
(C0068)	12 bit digital to analog converter for pedestal subtraction
	Range: $-2.048~V~\rightarrow +2.048~V$, 1 mV per count
	<31:28>	undefined
	<27:16>	DAC Register
	High Gain Pedestal DAC (all high gain channels) WO
	<15:11>	undefined
	<11:0>	DAC register
	$FFF \rightarrow +2.048~V$
	$BE8 \rightarrow +1.000~V$
	$418 \rightarrow -1.000~V$
	$000 \rightarrow -2.048~V$